About Me

I'm a second year PhD student at University of Illinois Urbana-Champaign. I am advised by Prof. Jian Huang as a member of the Systems Platform Research Group. I obtained my Dual Bachelor's Degree in Computer Engineering at University of Michigan and Electrical and Computer Engineering at Shanghai Jiao Tong University.

I'm broadly interested in Computer Architecture and System Software. My current research focuses on building memory/storage systems and architecture for hardware accelerators and AI systems. Besides, I'm also interested in exploiting static program analysis techniques to assist hardware design, improve performance, or provide security.

Links:

News

  • [Jul. 2023] Our work on enabling an efficient unified GPU memory and storage architecture with smart tensor migrations got accepted to appear at MICRO'23!
  • [Aug. 2022] Our work on scheduling information-guided efficient HLS design space exploration got accepted to appear at ICCD'22!
  • [Aug. 2022] I graduated from SJTU!
  • [May 2022] I will be the Teaching Assistant for VE470 (Computer Architecture) in Summer 2022 at SJTU!
  • [May 2022] I graduated from University of Michigan!
  • [Mar. 2022] I will join the family of the UIUC PlatformX Lab as a Ph.D. student this fall. Thanks Prof. Huang!
  • [Nov. 2021] Our work on debugging on reconfigurable hardware got accepted to appear at ASPLOS'22!

    • Experience

    Education

    University of Illinois Urbana-Champaign, Urbana, IL, USA | Aug. 2022 - Present

    Ph.D. in Computer Science | Advisor: prof. Jian Huang

    University of Michigan, Ann Arbor, MI, USA | Sept 2020 - Apr 2022

    B.SE. Computer Engineering (Dual Degree) | Advisor: prof. Baris Kasikci

    Shanghai Jiao Tong University (UM-SJTU JI), Shanghai, China | Sept 2018 - Aug 2022

    B.S. Electrical and Computer Engineering (Dual Degree) | Advisor: prof. Weikang Qian

    McGill University, Montreal, Canada | Jan 2020 - Feb 2020

    Winter Exchange Program - Intro. to Data Modeling/Project Management

    Internship

  • Jul. 2021 - Aug. 2021
    • Software Research & Development Intern – T-head Division, Alibaba Cloud

    Publications

    Haoyang Zhang*, Yirui Eric Zhou*, Yuqi Xue, Yiqi Liu, Jian Huang, "G10: Enabling An Efficient Unified GPU Memory and Storage Architecture with Smart Tensor Migrations", To Appear in IEEE/ACM 56th International Symposium on Microarchitecture. (MICRO '23)

    Jiacheng Ma, Gefei Zuo, Kevin Loughlin, Haoyang Zhang, Andrew Quinn, Baris Kasikci, "Debugging in the Brave New World of Reconfigurable Hardware", International Conference on Architectural Support for Programming Languages and Operating Systems, 2022. (ASPLOS '22)

    Xingyue Qian, Jian Shi, Li Shi, Haoyang Zhang, Lijian Bian and Weikang Qian, "Scheduling Information-Guided Efficient High-Level Synthesis Design Space Exploration", 2022 IEEE 40th International Conference on Computer Design. (ICCD '22)

    Selected Projects

    Research

    G10: Breaking GPU Memmory Wall with Smart Tensor Migrations

  • Instructed by Professor Jian Huang.
  • To Appear on MICRO'23
  • We present a unified GPU memory and storage architecture driven by the fact that DNN workloads are highly predictable. G10 integrates the host memory, GPU memory, and flash memory into a unified memory space, to scale the GPU memory capacity while enabling transparent data migrations. G10 utilizes compiler techniques to characterize the tensor behaviors in DNN workloads to schedule data migrations in advance by considering the available bandwidth of flash memory, host memory, and interconnections.

    • Reconfigurable Hardware Debugging

  • Instructed by Professor Baris Kasikci.
  • Published on ASPLOS'22
  • Study bugs in existing FPGA designs and produce a testbed to reliably reproduce each bug. Build a novel collection of hybrid static/dynamic program analysis and monitoring tools for debugging FPGA designs.

    • MiniHLS: A Simple High-Level Synthesis Tool

  • Instructed by Professor Weikang Qian.
  • Published on ICCD'22
  • An HLS tool based on LLVM, which can compile C functions to Verilog modules, having multiple features including loop unrolling and array partition, support for structs and classes, tcl file parsing, etc.

    • Misc

    Personal

    • I was born and raised up in Xi'an, one of the oldest cities in China. In Xi'an, building a metro needs a professional archaeology team.
    • My friends are the most important thing in my life, and the most powerful source of my mental support.
    • Several things I'm interested in: Travelling, Photographing, Singing, Teaching, Cooking, Board games, Table tennis.

    Friends

    Moments

    This is a photo of me doing volunteering teaching at Yunnan Sanhe junior school, 2019. This is my first time being a real "teacher", and I was talking about optics. I found I really love the feeling of teaching and helping those children from areas with few educational resources.

    This is a photo of a blackboard when I was attending the University Physics Competition (UPC) 2019. We make a design of Roller Coaster Based on NURBS Curves in 48 hours. We stayed up very late the last day, however it's certainly a very special experience in my life. As a result, our work won a silver medal.

    Contact Me

    Welcome to drop me a message! Some of my social accounts and my email address are listed at the bottom right corner of the website.